L4995K 데이터 시트보기 (PDF) - STMicroelectronics

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L4995K

5V, 500mA low drop voltage regulator

STMicroelectronics 

Block diagrams and pins descriptions

Figure 3. Block diagram of L4995R

)S 9V

63

6%N

6WDUWXS

9ROWDJH

5HIHUHQFH

9

P9 B

L4995

9R )O

9RV

6O

5HV

9FU

6CR

'.$

/RZ9ROWDJH

5HVHW

6 2ES

'!0'-3

Table 2.

Pin

name

En

NC

GND

-

Res

Vcr

Vcw

Pins descriptions

PowerSSO-12 PowerSSO-24

pin #

pin #

Function

1

2, 4, 8

3

13, 14, 15

Enable input (L4995 and L4996A only, otherwise not

connected).

If high regulator, watchdog and reset are operating. If

low regulator, watchdog and reset are shutdown.

Connect to Vs if not used.

3, 5, 6, 9, 11 Not connected.

16, 17, 18 Ground reference.

TAB

TAB, 1, 12

Substrate of the chip: connect the pins or the TAB to

GND.

Reset output.

5

19, 20, 21 It is pulled down when output voltage goes below Vo_th

or frequency at Wi is too low. Leave floating if not used.

Reset timing adjust.

6

22, 23, 24 A capacitor between Vcr pin and GND. Sets the reset

delay time (trd). Leave floating if Reset is not used.

Watchdog timer adjust (L4995 only, otherwise not

connected).

7

2

A capacitor between Vcw pin and GND. Sets the time

response of the watchdog monitor.

6/35

Doc ID 13103 Rev 13

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