LC78684E 데이터 시트보기 (PDF) - SANYO -> Panasonic
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LC78684E Datasheet PDF : 21 Pages
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Serial Data I/O Interface
DRAM Serial Data Output Timing
T5
STREQ
STCK
STDAT
CRCF
T3
STCK
LC78684E
T4
Fsck
T6
T7
STDAT
T1 T2
: Performing a serial data output operation requires that a command to transfer data from DRAM be issued.
If this command has not been issued, the STCK and STDAT pins will not output the clock and data signals, even if the STREQ goes
high.
Transfer clock frequency
STDAT/STCK setup time
STDAT/STCK hold time
Data (1byte) transfer time
Data transfer wait time
Data transfer start time
Data transfer stop time
Enable flag turn off time
Parameter
Symbol
Fsck
T1
T2
T3
T4
T5
T6
T7
min
Ratings
typ
max
Unit
4.2336
MHz
30
ns
30
ns
1.89
Ps
1.89
Ps
1.89
15.2
Ps
0
15.2
Ps
210
236.2
270
ns
Notes: The typical values shown apply when the frequency of the clock input to the CKIN pin is 16.9344 MHz.
x The fsck clock frequency can also be set to 2.1168 or 1.0584 MHz (typical). The values of T3 to T7 will be, in that case, 2
or 4 times the values shown.
x When the STREQ pin is in input mode, the WOK, OVF, and CNTOK pins can be used instead of the STREQ, STCK, and
SDAT pins. The timing specifications in this case are the same as those shown above.
No.7350-14/21
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