LD3986J29R-E 데이터 시트보기 (PDF) - STMicroelectronics

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LD3986J29R-E

DUAL ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE REG. FOR USE WITH VERY LOW ESR OUT. CAPACITORS

STMicroelectronics 

LD3986 SERIES

source used to drive the EN input must be able to

swing above and below the specified turn-on/off

voltage thresholds listed in the Electrical

Characteristics section under Enable Input Logic

Low and Enable Input Logic High.

Proper operation of the Enable function is

guaranteed by driving EN pins with TR and TF = 10

ms.

FAST ON-TIME

The LD3986 outputs are turned on after VREF

voltage reaches its final value (1.23V nominal). To

speed up this process, the noise reduction

capacitor at the bypass pin is charged with an

internal 70µA current source. The current source

is turned off when the bandgap voltage reaches

approximately 95% of its final value. The turn on

time is determined by the time constant of the

bypass capacitor. The smaller the capacitor value,

the shorter the turn on time, but less noise gets

reduced. As a result, turn on time and noise

reduction need to be taken into design

consideration when choosing the value of the

bypass capacitor.

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