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108555541

L9311 Line Interface and Line Access Circuit Full-Feature SLIC with High Longitudinal Balance, Ringing Relay, and GR-909 Test Access

Agere -> LSI Corporation 

L9311 Full-Feature SLIC with High Longitudinal Balance,

Ringing Relay, and GR-909 Test Access

Data Sheet

July 2001

Pin Information (continued)

Table 1. Pin Descriptions (continued)

Pin Symbol Type

Name/Function

9 LCF

— Loop Closure Filter Capacitor. PPM injection can cause false loop closure indication.

Connect a capacitor from this node to VCC to filter the loop closure detector. If loop clo-

sure filtering is not required, leave this node open.

10 BGND G Battery Ground. Ground return for the battery supply.

11 RPWR

P Auxiliary Battery. If a lower-voltage auxiliary battery is used, connect the auxiliary bat-

tery supply to this node. If a power control resistor is used, connect the power control

resistor from this node to VBAT1. If no power control technique is used, connect this node

to VBAT1.

12 VBAT1

P Office Battery Supply. Negative high-voltage power supply.

13 VBAT1

P Office Battery Supply. Negative high-voltage power supply.

14 BGND G Battery Ground. Ground return for the battery supply.

15 TESTSIG I Test Input. This input injects a test signal to the line when an appropriate test operational

state is chosen. Connect this node to VREF if not used.

16 TIE A’ — Connect to VREF.

17 TESTLEV O Test Level Output. This output pin will provide a voltage that is proportional to either the

dc line voltage, dc line current, ac line voltage, ac line current, or internal reference volt-

age dependent upon which operational state is selected.

18 NC

38

— No Connect. May not be used as a tie point.

19 RTS

I Ring Trip Sense. Sense input for the ring trip detector.

20 RSW

O Ring Lead Ringing Access Switch. Ringing relay connects this pin to pin RRING. Con-

nect this pin to pin PR through a 400 Ω current-limiting resistor.

21 RRING I Ringing Access. Input to solid-state ringing access switch. Connect to ringing generator.

22 PR

I/O Protected Ring. The output of the ring driver amplifier and input to loop sensing con-

nected through solid-state break switch. Connect to subscriber loop through overvoltage/

current protection.

23 PT

I/O Protected Tip. The output of the tip driver amplifier and input to loop sensing connected

through solid-state break switch. Connect to subscriber loop through overvoltage/current

protection.

24 TRING O Tip Ringing Return. Ring relay connects this pin to PT. Connect to ringing supply return.

25 NSTAT

O Loop Status. The output of the loop status detector (loop start detector wired-OR with

ring trip detector). This loop status supervision output is not controlled by the data latch.

26 B3

I Data Control Input. See Table 2, Primary Control States and Table 3, Secondary Control

States for details.

27 B2

I Data Control Input. See Table 2, Primary Control States and Table 3, Secondary Control

States for details.

28 B1

I Data Control Input. See Table 2, Primary Control States and Table 3, Secondary Control

States for details.

29 B0

I Data Control Input. See Table 2, Primary Control States and Table 3, Secondary Control

States for details.

30 RESET

I Reset. A logic low will override the B[0:3] and LATCH inputs and reset the state of the

SLIC to the disconnect state and the switch to the all-off state.

31 LATCH I Latch Control Input. Edge-level sensitive control for data latches.

32

VDD

P 5 V Digital Power Supply. 5 V supply for digital circuitry.

10

Agere Systems Inc.

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