MAX9879 데이터 시트보기 (PDF) - Maxim Integrated
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MAX9879 Datasheet PDF : 32 Pages
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MAX9879
Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
I2C Interface
I2C Address
The slave address of the MAX9879 is 1001101R/(W)
(write: 0x9A, read: 0x9B).
Table 1. Register Map
REGISTER
REGISTER
ADDRESS
POR STATE
B7
B6
B5
B4
Input Mode
Control
0x00
0x40
0
ZCD ΔINA ΔINB
Speaker
Volume
Control
0x01
0x00
0
0
0
Left
Headphone
Volume
Control
0x02
0x00
0
0
0
Right
Headphone
Volume
Control
Output Mode
Control
0x03
0x04
0x00
0
0
0
0x49
SHDN BYPASS 0
ENB
Table 2. Input Mode Control Register
REGISTER
B7
0x00
0
B6
ZCD
B5
ΔINA
B4
ΔINB
B3
B2
PGAINA
B3
B2
PGAINA
B1
B0
PGAINB
SPKVOL
HPLVOL
HPRVOL
ENA
LSPK
EN
RSPK
EN
HPEN
B1
B0
PGAINB
I2C Register Description
Zero-Crossing Detection (ZCD)
Zero-crossing detection limits distortion in the output
signal during volume transitions by delaying the transi-
tion until the mixer output crosses the internal bias volt-
age. A timeout period (typically 60ms) forces the
volume transition if the mixer output signal does not
cross the bias voltage.
1 = Zero-crossing detection is enabled.
0 = Zero-crossing detection is disabled.
Differential Input Configuration (ΔIN_)
The inputs INA_ and INB_ can be configured for mono
differential or stereo single-ended operation.
1 = IN_ is configured as a mono differential input with
IN_2 as the positive and IN_1 as the negative input.
0 = IN_ is configured as a stereo single-ended input
with IN_2 as the right and IN_1 as the left input.
Preamplifier Gain (PGAIN_)
The preamplifier gain of INA_ and INB_ can be pro-
grammed by writing to PGAIN_.
00 = 0dB
01 = +5.5dB
10 = +20dB
11 = Reserved
22
Maxim Integrated
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