MB90050PF 데이터 시트보기 (PDF) - Fujitsu

부품명

상세내역

제조사

MB90050PF

On-Screen Display Controller

Fujitsu 

MB90050

Pin

no.

Pin

name

I/O

Circuit

type

Function

9 VSYNCO O

Vertical sync signal output pin.

The pin enables output (ON/OFF) control, output logic control, and internal pull-

F up ON/OFF control depending on the command setting.

When the RESET pin inputs the low level signal, this pin turns off the internal

pull-up resistor and sets the output to OFF (output tied to the high).

10 HSYNCO O

Horizontal sync signal output pin.

The pin enables output (ON/OFF) control, output logic control, and internal pull-

F up ON/OFF control depending on the command setting.

When the RESET pin inputs the low level signal, this pin turns off the internal

pull-up resistor and sets the output to OFF (output tied to the high).

11 CSYNCO O

Composite sync signal output pin.

The pin enables output (ON/OFF) control, output logic control, and internal pull-

F up ON/OFF control depending on the command setting.

When the RESET pin inputs the low level signal, this pin turns off the internal

pull-up resistor and sets the output to OFF (output tied to the high).

12 VBLKO O

Vertical blanking interval (VBI) output pin.

The pin enables output (ON/OFF) control, output logic control, and internal pull-

F up ON/OFF control depending on the command setting.

When the RESET pin inputs the low level signal, this pin turns off the internal

pull-up resistor and sets the output to OFF (output tied to the low).

13 FLDO O

Field signal output pin.

During operation under internal synchronization control, this pin outputs the in-

ternally generated field signal.

During operation under external synchronization control, the pin outputs the

F

field signal (internally detected field signal or external input field signal) used for

internal operations.

The pin enables output (ON/OFF) control, output logic control, and internal pull-

up ON/OFF control depending on the command setting.

When the RESET pin inputs the low level signal, this pin turns off the internal

pull-up resistor and sets the output to OFF (output tied to the low).

14 SYNCST O

Synchronization detection signal output pin.

This pin outputs a significant level signal with a sync signal detected and an in-

significant level signal with no sync signal detected.

F The pin enables output (ON/OFF) control, output logic control, and internal pull-

up ON/OFF control depending on the command setting.

When the RESET pin inputs the low level signal, this pin turns off the internal

pull-up resistor and sets the output to OFF (output tied to the low).

(Continued)

6

Share Link: