MB91360G(2001) 데이터 시트보기 (PDF) - Fujitsu
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MB91360G Datasheet PDF : 206 Pages
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MB91360G Series
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• External bus interface unit with a wide range of functions
Divides the external memory space into a maximum of eight areas. Chip select signal setting, data bus width
selection (8, 16, 32-bit) , and area size can be specified for each area.
• Address bus up to 32 bit wide
• Programmable auto-wait function
• Internal instruction cache
The MB91360G series contains up to 4-Kbyte instruction cache to improve the execution speed of external
programs.
• Two-way set associative caching
• DMAC
Direct memory access (DMA) can be used to perform various types of data transfer without going via the CPU.
This improves system performance.
• Eight channels (including up to 3 external channels)
• Three transfer modes supported : single/block, burst, continuous transfer
• Power consumption control mechanisms
The MB91360G series contains a number of functions for controlling the operating clock to reduce power
consumption.
• Software control : Sleep and stop/real time clock functions
• Hardware control : Hardware standby function
• Gear (divider) function : The CPU and peripheral clock frequencies can be set independently.
• Contains a range of peripheral functions
• UART, U-timer
• Real Time Clock (with optional subclock operation and subclock calibration module)
• Stepper Motor Control
• Sound Generator
• Serial IO (SIO) , SIO-Prescaler
• Power Down Reset
• Alarm Comparator
• IO-Timer
• I2C Interface
• 10 Bit D/A Converter
• CAN Interface
• 10-bit A/D converter
• 16-bit reload timer
• 16-bit PWM timer
• Watchdog timer
• Bit search module
• Interrupt controller
• External interrupt inputs
• I/O port function
• Interrupt levels
“16 maskable interrupt levels”
• Other
• Power supply voltage
• 5 V power supply used, the internal regulator creates internal supply of 3.3 V
• Package : MB91FV360GA uses a PGA401 package, MB91F362GA is delivered in a QFP208 package, and
MB91F369GA in QFP160 package.
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