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MC100LVEL05DTR2G(2016) 데이터 시트보기 (PDF) - ON Semiconductor

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MC100LVEL05DTR2G
(Rev.:2016)
ON-Semiconductor
ON Semiconductor 
MC100LVEL05DTR2G Datasheet PDF : 6 Pages
1 2 3 4 5 6
MC100LVEL05
Table 5. AC CHARACTERISTICS (VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = 3.3 V (Note 1))
405C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
fmax
tPLH
tPHL
tJITTER
VPP
tr
tf
Maximum Toggle Frequency
Propagation Delay to Output
Cycle-to-Cycle Jitter
Input Swing (Note 2)
Output Rise/Fall Times Q
(20% 80%)
TBD
TBD
TBD
GHz
240 260 440 240 340 440 250
450 ps
TBD
TBD
TBD
ps
150
1000 150
1000 150
1000 mV
100
320 100 210 320 100
320 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. VEE can vary ±0.3 V.
2. VPP(min) is the minimum input swing for which AC parameters are guaranteed. The device has a DC gain of 40.
Q
Driver
Device
Q
Zo = 50 W
Zo = 50 W
50 W
50 W
D
Receiver
Device
D
VTT
VTT = VCC 3.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D Termination of ECL Logic Devices.)
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D ECLinPSt I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
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