MC100EP131FAG 데이터 시트보기 (PDF) - ON Semiconductor

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MC100EP131FAG

3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock

ON Semiconductor 

MC10EP131, MC100EP131

Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)

−40°C

25°C

85°C

Symbol

Characteristic

Min Typ Max Min Typ Max Min Typ Max Unit

fmax

Maximum Frequency

>3

>3

>3

GHz

(See Figure 4. Frequency vs. VOUTpp

and JITTER)

tPLH,

tPHL

Propagation Delay to

Output Differential CC

R0−3

SET

C0−3

320 450 520 380 460 580 450 560 650 ps

320 450 520 400 500 600 450 560 650

320 430 520 380 480 580 450 560 700

300 430 550 380 460 580 400 530 650

tRR

Set/R0−3 Recovery

290 210

290 210

350 280

ps

tS

Setup Time

tH

Hold Time

120 80

120 80

120 80

ps

tPW

Minimum Pulse Rate

R0−3

SET,

550 400

550 400

550 400

tJITTER

Cycle−to−Cycle Jitter

(See Figure 4. Frequency vs. VOUTpp

and JITTER)

0.2 < 1

0.2 < 1

0.2 < 1 ps

tr

Output Rise/Fall Times

Q, Q

110 180 250 125 200 275 150 230 300 ps

tf

(20% − 80%)

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

20. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.

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