2
4
3
6
5
7
10
12
11
14
13
15
1
VBB*
GND = Pin 16
VCC ( +5.0 Vdc) = Pin 9
VEE ( −5.2 Vdc) = Pin 8
*VBB to be used to supply bias to the MC10H125
only and bypassed (when used) with 0.01 mF to
0.1 mF capacitor to ground (0 V). VBB can source <
1.0 mA.
Figure 1. Logic Diagram
MC10H125
VBB
1
Ain
2
Ain
3
Aout
4
Bout
5
Bin
6
Bin
7
VEE
8
16
GND
15
Din
14
Din
13
Dout
12
Cout
11
Cin
10
Cin
9
VCC
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables.
Figure 2. Pin Assignment
Table 1. DIP CONVERSION TABLES
16−Pin DIL to 20−Pin PLCC
16 PIN DIL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
20 PIN PLCC
2 3 4 5 7 8 9 10 12 13 14 15 17 18 19 20
20−Pin DIL to 20−Pin PLCC
20 PIN DIL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
20 PIN PLCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
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