MC10H135FN 데이터 시트보기 (PDF) - ON Semiconductor

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MC10H135FN

Dual J−K Master−Slave Flip−Flop

ON Semiconductor 

S1 5

J1 7

K1 6

Q1

2

Q1

3

R1 4

C9

S2 12

J2 10

VCC1 = PIN 1

VCC2 = PIN 16

VEE = PIN 8

Q2

15

K2

11

R2 13

Q2

14

Figure 1. Logic Diagram

VCC1

1

16

VCC2

Q1

2

15 Q2

Q1

3

14 Q2

R1

4

13 R2

S1

5

12 S2

K1

6

11 K2

J1

7

10 J2

VEE

8

9

C

Pin assignment is for Dual−in−Line Package.

Figure 2. Pin Assignment

MC10H135

Table 1. RS TRUTH TABLE

R

S

L

L

L

H

Qn+1

Qn

H

H

L

L

H

H

ND

ND = Not Defined

Table 2. CLOCK J−K TRUTH TABLE*

J

K

L

L

H

L

Qn+1

Qn

L

L

H

H

H

H

Qn

*Output states change on positive transition of clock for J − K input

condition present.

Table 3. MAXIMUM RATINGS

Symbol

Characteristic

Rating

Unit

VEE

Power Supply (VCC = 0)

VI

Input Voltage (VCC = 0)

Iout

Output Current − Continuous

− Surge

−8.0 to 0

Vdc

0 to VEE

Vdc

50

mA

100

TA

Operating Temperature Range

Tstg

Storage Temperature Range − Plastic

− Ceramic

0 to +75

°C

−55 to +150

°C

−55 to +165

°C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit

values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,

damage may occur and reliability may be affected.

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