MC33492 데이터 시트보기 (PDF) - Motorola => Freescale

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MC33492

PLL Tuned UHF Transmitter for Data Transfer Applications

Motorola => Freescale 

Freescale SMeCm33ic49o2nductor, Inc.

Figure 3 shows the waveforms of the main signals for a typical application cycle

Figure 3: Signals waveforms and timings definition

ENABLE

DATACLK

DATA

tDATACLK_settling

€

tPLL_lock_in

RFOUT

State 1

State 2

fcarrier

fcarrier

State 4

€ : PLL locked

State 1

POWER MANAGEMENT

When the battery voltage falls below the shutdown voltage threshold (VSDWN) the whole circuit is switched off.

It has to be noted that after this shutdown, the circuit is latched until a low level is applied on pin ENABLE (see

state 6 of the state machine).

DATA CLOCK

At start-up data clock timing is valid after the data clock settling time. As clock is switched off asynchronously

the last period length cannot be guaranteed.

For More Information On This Product,

PLL Tuned UHF TGraonstmo:itwtewr fwor.fDraeteasTcraanles.fceroAmpplications

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