MC34055 데이터 시트보기 (PDF) - Motorola => Freescale
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MC34055 Datasheet PDF : 16 Pages
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MC34055
TIMING CHARACTERISTICS (0°C ≤ TA ≤ 70°C)
Characteristic
Symbol
Min
Typ
Max
Unit
TRANSMIT START TIMING
TX EN H to TX+/TX– Enable Time
tTXEN
–
–
75
ns
TX Data A/B to TX+/TX– Enable Time
tFDXD
–
–
75
ns
Steady State Propagation Delay of TX Data A/B to TX+/TX– Output
tTXSS
–
–
75
ns
Pre–Emphasis Pulse Width
tPRCM
45
–
55
ns
Transmitter Caused Edge Skew Between TX+ and TX–
tSkew T
–
–
2.0
ns
Transmitter Added Edge Jitter to TX+/TX– from TX Data A/B
tJitter T
–
–
4.0
ns
Steady–State Delay between the TX Data A/B Input to the RX Data
tTXRX
–
A/B Outputs for Normal Operation
–
50
ns
TX EN H Assert to RX EN H Assert Under Normal Operation
TRANSMIT STOP TIMING
Delay between TX EN H Low and TX+/TX– High
TX EN H Assert/De–assert Delay from TX EN H to RX EN H
Assert/De–assert
tDREL
–
tTXDH
–
tXTRE
–
–
50
ns
–
75
ns
–
400
ns
End of Packet Hold Time from Last TX Data A/B Edge or
TX EN H De–assert
tTDDC
250
–
–
ns
LINK BEAT PULSES
Output Link Test Pulse Width
Minimum Link Beat Pulse Duration on RX+/RX–
LOOP BACK MODE TIMING
Delay from Loop L Deassertion to RX EN H Driven from
TX EN H Status
tLKPW
80
tLDCY_A
80
tLTRA
–
–
120
ns
–
192
ns
–
30
ns
TX EN H Assert/De–assert to RX EN H, Assert/De–assert when in
tLTRX
–
Loop–Back Mode and Receiver Inactive
–
50
ns
Steady–State TX Data A/B to RX Data A/B when in Loop–Back Mode
tLTRD
–
SMART SQUELCH
Interval Unit Squelch Deactivation
tSQ
–
–
50
ns
–
5.0
Bit
Times
RECEIVE START TIMING
Receiver–Added Edge Skew to RX Data A/B Signal
Receiver–Added Edge Jitter to RX Data A/B Signal
Start–Up Delay from RX+/RX– to RX Data A/B
Delay from RX EN H Assertion Until RX Data A/B Valid
Steady–State Propagation Delay from RX+/RX– Data A/B
RECEIVE SHUTDOWN TIMING
Last received Data Edge until the RX EN H Output forces low
tSkew R
–
–
1.5
ns
tJitter R
–
–
1.5
ns
tRXNE
–
–
50
ns
tRARE
–10
–
+10
ns
tRXSS
–
–
50
ns
tRXDE
155
–
250
ns
4
MOTOROLA ANALOG IC DEVICE DATA
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