OKI Semiconductor
FEDL7204-001DIGEST-01
ML7204-001
Pin
When
TQFP100 QFP64
Symbol
I/O PDNB
= “0”
Description
Power-down input
61
42
PDNB
I
“0” “0”: Power-down reset
”1”: Normal operation
62
—
GPIOB[0] I/O
I General-purpose I/O port B[0]
63
—
GPIOB[1] I/O
I General-purpose I/O port B[1]
SYNC/BCLK input-output control input
64
43
CLKSEL
I
I “0”: SYNC/BCLK are configured to be input
“1”: SYNC/BCLK are configured to be output
65
—
GPIOB[2] I/O
I General-purpose I/O port B[2]
66
—
GPIOB[3] I/O
I General-purpose I/O port B[3]
67
44
DGND1
—
— Digital ground (0.0 V)
68
—
GPIOB[4] I/O
I General-purpose I/O port B[4]
69
—
GPIOB[5] I/O
I General-purpose I/O port B[5]
70
45
GPIOA[0]/DPI I/O
I
General-purpose I/O port A[0] [5 V tolerant pin]
Secondary function: Input pin for dial pulse detection
71
46
GPIOA[1] I/O
I General-purpose I/O port A[1] [5 V tolerant pin]
72
—
NC
—
— (Unused)
73
—
NC
—
— (Unused)
GPIOA[2]/DP
General-purpose I/O port A[2] [5 V tolerant pin]
74
47
O
I/O
I Secondary function: Output pin for dial pulse transmission
75
48
GPIOA[3] I/O
I General-purpose I/O port A[3] [5 V tolerant pin]
76
49
AVDD
—
— Analog power supply
77
—
NC
—
— (Unused)
78
50
AIN0P
I
I AMP0 non-inverting input
79
51
AIN0N
I
I AMP0 inverted input
80
52
GSX0
O “Hi-z” AMP0 output (10 kΩ driving)
81
—
NC
—
— (Unused)
82
53
GSX1
O “Hi-z” AMP1 output (10 kΩ driving)
83
54
AIN1N
I
I AMP1 inverted input
84
—
NC
—
— (Unused)
85
55
AVREF
O
“L” Analog signal ground (1.4 V)
86
56
VFRO0
O “Hi-z” AMP2 output (10 kΩ driving)
87
57
VFRO1
O “Hi-z” AMP3 output (10 kΩ driving)
88
58
AGND
—
— Analog ground (0.0 V)
89
—
NC
—
— (Unused)
90
—
NC
—
— (Unused)
91
59
DGND2
—
— Digital ground (0.0 V)
92
60
XI
I
I 12.288 MHz crystal interface, 12.288 MHz clock input
93
—
NC
—
— (Unused)
94
61
XO
O “H” 12.288 MHz crystal interface
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