MM74C86M(2002) 데이터 시트보기 (PDF) - Fairchild Semiconductor
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MM74C86M Datasheet PDF : 5 Pages
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October 1987
Revised May 2002
MM74C86
Quad 2-Input EXCLUSIVE-OR Gate
General Description
The MM74C86 employs complementary MOS (CMOS)
transistors to achieve wide power supply operating range,
low power consumption and high noise margin these gates
provide basic functions used in the implementation of digi-
tal integrated circuit systems. The N- and P-channel
enhancement mode transistors provide a symmetrical cir-
cuit with output swing essentially equal to the supply volt-
age. No DC power other than that caused by leakage
current is consumed during static condition. All inputs are
protected from damage due to static discharge by diode
clamps to VCC and GND.
Features
s Wide supply voltage range: 3.0V to 15V
s Guaranteed noise margin: 1.0V
s High noise immunity: 0.45 VCC (typ.)
s Low power: TTL compatibility:
Fan out of 2 driving 74L
s Low power consumption: 10 nW/package (typ.)
s The MM74C86 follows the MM74LS86 Pinout
Ordering Code:
Order Number Package Number
Package Description
MM74C86M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74C86N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
Inputs
A
B
L
L
L
H
H
L
H
H
H = HIGH Level
L = LOW Level
Output
Y
L
H
H
L
Top View
© 2002 Fairchild Semiconductor Corporation DS005887
www.fairchildsemi.com
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