MM74HCT74 데이터 시트보기 (PDF) - Fairchild Semiconductor

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MM74HCT74

Dual D-Type Flip-Flop with Preset and Clear

Fairchild Semiconductor 

Connection Diagram

Pin Assignments for DIP, SOIC, SOP and TSSOP

Truth Table

Inputs

PR CLR CLK D

L

H

X

X

H

L

X

X

L

L

X

X

H

H

↑

H

H

H

↑

L

H

H

L

X

Outputs

Q

Q

H

L

L

H

H(1)

H(1)

H

L

L

H

Q0

Q0

Q0 = the level of Q before the indicated input conditions

were established.

Note:

1. This configuration is nonstable; that is, it will not persist

when preset and clear inputs return to their inactive

(HIGH) level.

Logic Diagram

©1984 Fairchild Semiconductor Corporation

MM74HCT74 Rev. 1.4.0

2

www.fairchildsemi.com

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