MSC7118VF1200 데이터 시트보기 (PDF) - Freescale Semiconductor

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MSC7118VF1200

Low-Cost 16-bit DSP with DDR Controller

Freescale Semiconductor 

JTAG Port

JTAG

DMA

(32 Channel) AMDMA

64

to IPBus

SC1400

Core

DSP

Extended

Core

Trace

Buffer

(8 KB)

Fetch

Unit

Instruction

Cache

(16 KB)

128

Extended

Core

Interface

64

AMIC

AMEC

128 64

64

P XA XB

M1

SRAM

ASM1

(256 KB) 64

Note: The arrows show the

direction of the transfer.

ASM2

128

128

M2

SRAM

64 (192 KB)

64

ASEMI

64 from

IPBus

Boot ROM

128 (8 KB)

External

Memory

Interface

External Bus

32

Interrupts

Interrupt Control

ASTH

64

ASAPB

32

ASIB

32

to EMI

to DMA

Host

Interface

(HDI16)

HDI16

Port

32

TDM

2 TDMs

PLL/Clock

PLL/Clock

APB

I2C

I2C

UART

GPIO

RS-232

GPIO

System Ctrl

32

Watchdog Events

Event Port

BTMs

to/from OCE10

IPBus

Timers

Figure 1. MSC7118 Block Diagram

MSC7118 Low-Cost 16-bit DSP with DDR Controller Data Sheet, Rev. 7

Freescale Semiconductor

3

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