MT8971B/72B
LOUT 1
VBias 2
VRef 3
MS2 4
MS1 5
MS0 6
RegC 7
F0/CLD 8
CDSTi/CDi 9
CDSTo/CDo 10
VSS 11
22 VDD
21 LIN
20 TEST
19 LOUT DIS
18 Precan
17 OSC1
16 OSC2
15 C4/TCK
14 F0o/RCK
13 DSTi/Di
12 DSTo/Do
•
MS2 5
25 NC
NC 6
24 LOUT DIS
MS1 7
23 Precan
MS0 8
22 OSC1
RegC 9
21 OSC2
F0/CLD 10
NC 11
20 NC
19 C4/TCK
22 PIN PDIP/CERDIP
28 PIN PLCC
Pin Description
Figure 2 - Pin Connections
Pin #
Name
DIP PLCC
Description
12
LOUT Line Out. Transmit Signal output (Analog). Referenced to VBias.
23
VBias Internal Bias Voltage output. Connect via 0.33 µF decoupling capacitor to VDD.
34
VRef Internal Reference Voltage output. Connect via 0.33 µF decoupling capacitor to VDD.
4,5, 5,7, MS2-MS0 Mode Select inputs (Digital). The logic levels present on these pins select the various
68
operating modes for a particular application. See Table 1 for the operating modes.
79
RegC Regulator Control output (Digital). A 512 kHz clock used for switch mode power
supplies. Unused in MAS/MOD mode and should be left open circuit.
8 10 F0/CLD Frame Pulse/C-Channel Load (Digital). In DN mode a 244 ns wide negative pulse input
for the MASTER indicating the start of the active channel times of the device. Output for
the SLAVE indicating the start of the active channel times of the device. Output in MOD
mode providing a pulse indicating the start of the C-channel.
9 12
CDSTi/ Control/Data ST-BUS In/Control/Data In (Digital). A 2.048 Mbit/s serial control &
CDi signalling input in DN mode. In MOD mode this is a continuous bit stream at the bit rate
selected.
10 13
CDSTo/ Control/Data ST-BUS Out/Control/Data Out (Digital). A 2.048 Mbit/s serial control &
CDo signalling output in DN mode. In MOD mode this is a continuous bit stream at the bit rate
selected.
11 14
VSS Negative Power Supply (0V).
12 15 DSTo/Do Data ST-BUS Out/Data Out (Digital). A 2.048 Mbit/s serial PCM/data output in DN mode.
In MOD mode this is a continuous bit stream at the bit rate selected.
13 16
DSTi/Di Data ST-BUS In/Data In (Digital). A 2.048 Mbit/s serial PCM/data input in DN mode. In
MOD mode this is a continuous bit stream at the bit rate selected.
14 17 F0o/RCK Frame Pulse Out/Receive Bit Rate Clock output (Digital). In DN mode a 244 ns wide
negative pulse indicating the end of the active channel times of the device to allow daisy
chaining. In MOD mode provides the receive bit rate clock to the system.
15 19
16 21
C4/TCK
OSC2
Data Clock/Transmit Baud Rate Clock (Digital). A 4.096 MHz TTL compatible clock
input for the MASTER and output for the SLAVE in DN mode. For MOD mode this pin
provides the transmit bit rate clock to the system.
Oscillator Output. CMOS Output.
9-108