AD9660KR 데이터 시트보기 (PDF) - Analog Devices

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AD9660KR

200 MHz Laser Diode Driver with Light Power Control

Analog Devices 

AD9660

The trace from the output pins of the AD9660 to the anode of

the laser (send trace) should be several millimeters wide and

should be as direct as possible. The return current will choose

the path of least resistance. If the return path is the ground

plane, it should have an unbroken path, under the output trace,

from the laser cathode back to the AD9660. If the return path is

not the ground plane (such as on a two layer board, or on the

+VS plane), it should still be on the board plane adjacent to the

plane of the output trace. If the current cannot return along a

path that follows the output trace, the inductance will be drasti-

cally increased and performance will be degraded.

Optimizing the Feedback Layout

In applications where the dynamic performance of the analog

feedback loop is important, it is necessary to optimize the layout

of the gain resistor, RGAIN, as well as the monitor current path to

SENSE IN. Such applications include MOD systems which

recalibrate the write loop on pulses as short as 25 ns, and closed

loop applications.

The best possible TZA settling will be achieved by using a

single carbon surface mount resistor (usually 5% tolerance) for

RGAIN and small surface mount capacitor for CGAIN. Because the

GAIN pin (Pin 9) is essentially connected to the inverting input

of the TZA, it is very sensitive to stray capacitance. RGAIN

should be placed between Pin 9 and Pin 10, as close as possible

to Pin 9. Small traces should be used, and the ground and +VS

planes adjacent to the trace should be removed to further mini-

mize stray capacitance.

The trace from SENSE IN to the cathode of the PIN photo-

detector should be thin and routed away from the laser anode

trace.

+VS PIN CONNECTIONS

5

AD9660

OUTPUT PIN CONNECTIONS

PIN ASSIGNMENTS

MUTUAL COUPLING

REDUCES INDUCTANCE

25

24

23

22

21

20

19

4

BYPASS CAPS

GROUND PIN

CONNECTIONS

GROUND PLANE

LASER DIODE CURRENT

PATH SEGMENTS

(SEE TEXT)

1

3

2

Figure 11. Laser Diode Current Loop

REV. 0

–11–

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