NTB75N06L 데이터 시트보기 (PDF) - ON Semiconductor
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NTB75N06L Datasheet PDF : 7 Pages
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NTP75N06L, NTB75N06L
12000
10000
8000
VDS = 0 V
Ciss
VGS = 0 V
TJ = 25°C
6000 Crss
Ciss
4000
2000
Coss
Crss
0
10
5 VGS 0 VDS 5
10
15 20 25
GATE−TO−SOURCE OR DRAIN−TO−SOURCE (V)
Figure 7. Capacitance Variation
6
5
Q1
4
QT
VGS
Q2
3
2
1
ID = 75 A
TJ = 25°C
0
0
10
20
30
40
50
60 70
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
VDS = 30 V
ID = 75 A
VGS = 5 V
tr
tf
100
td(off)
td(on)
10
1
10
100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variations
vs. Gate Resistance
80
VGS = 0 V
70 TJ = 25°C
60
50
40
30
20
10
0
0.6 0.64 0.68 0.72 0.76 0.8 0.84 0.86 0.92 0.96
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
1000
VGS = 15 V
SINGLE PULSE
TC = 25°C
100
10 ms
100 ms
1 ms
10
10 ms
RDS(on) LIMIT
dc
THERMAL LIMIT
PACKAGE LIMIT
1
0.1
1
10
100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
1000
ID = 75 A
800
600
400
200
0
25
50
75
100
125 150 175
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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