CXA3286R 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA3286R

8-bit 160MSPS Flash A/D Converter

Sony Semiconductor 

CXA3286R

When the reset signal is not used

CLK

CLK

CXA3286R

CLK A A

RESETN

CLKOUT

8bit

DATA

CXA3286R

CLK B B

RESETN

CLKOUT

8bit

DATA

When the reset signal is used

CLK

CXA3286R

CLK

A

RESETN

CLK

RESET signal

CLKOUT

8bit

DATA

(Reset period)

RESET signal

CXA3286R

CLK

B

RESETN

CLKOUT

8bit

DATA

(Reset period)

2. Straight mode (See Application Circuits 1-(4), (5) and (6).)

Set the SELECT1 pin to GND for this mode. In this mode, data output can be obtained in accordance with the

clock frequency applied to the A/D converter for applications which use the clock applied to the A/D converter

as the system clock.

The A/D converter can operate at Fc (min.) = 125MSPS in this mode.

Digital input level and supply voltage settings

The logic input level for the CXA3286R supports ECL, PECL and TTL levels.

The power supplies (DVEE3, DGND3) for the logic input block must be set to match the logic input (CLK and

reset signals) level.

Digital input level

ECL

PECL

TTL

DVEE3

–5V

0V

0V

DGND3

0V

+5V

+5V

Supply voltage Application circuits

±5V

(1) (4)

+5V

(2) (5)

+5V

(3) (6)

Table 3. Logic Input Level and Power Supply Settings

Description of SELECT2 pin

The CXA3286R has two systems of data outputs and the port where the data is output can be selected by the

SELECT2 pin.

SELECT2 pin

Open

Vcc1

GND1

Data output

PA and PB both sides output possible

PA side output possible; PB side in high impedance

PB side output possible; PA side in high impedance

– 13 –

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