Philips Semiconductors
GSM signal processing IC
Objective specification
PCF5083
SYMBOL
AUXON
LOWVOLT
POWON
NPOWON
RST
PIN
33
34
35
36
37
CLK32K
38
CLK26M
TXD
39
RXD
40
MMIEN
41
MMIREQ
42
MMICLK
43
FSC
44
DCL
45
DU
46
DD
47
VSS2
48
VDD1
49
VSS1
50
VDD2
51
RFCLK
52
RFEN1
53
RFEN2
54
RFEN3
55
RFEN4
56
VDD2
57
VSSPLL
58
RFDI
59
RFDO
60
RFE
61
NREFON
62
I/O
DESCRIPTION
I
Auxiliary Switch on input (active HIGH, CMOS level Schmitt trigger input).
I
Low battery indication (active LOW, CMOS level Schmitt trigger input).
O Power Regulator on (active HIGH).
O Power Regulator on (active LOW).
I
Asynchronous Reset for timer section (active LOW, CMOS level Schmitt trigger
input).
O The 32.768 kHz CMOS level output for PCF5083-2B and PCF5083-2C.
The 26 MHz CMOS level output for PCF5083-3.
O RS232 transmit data output (open-drain output).
I
RS232 receive data input.
O RS232 input buffer full indication (active LOW, open-drain output).
I
MMI clock request (active HIGH, CMOS level Schmitt trigger input).
O MMI clock 13 MHz.
I/O IOM®-2 frame pulse (3-state).
I/O IOM®-2 clock (3-state).
I
IOM®-2 data input (CMOS level Schmitt trigger input).
O IOM®-2 data output (open drain output).
Ground core.
Supply I/O pin.
Ground I/O pin.
Supply core.
O RF−IC interface shift clock (3-state).
O RF−IC Interface Enable 1(active LOW, 3-state).
O RF−IC Interface Enable 2 (active LOW, 3-state).
O RF−IC Interface Enable 3 (active LOW, 3-state).
O RF−IC Interface Enable 4 (active LOW, 3-state).
Supply core.
Ground for PLL.
I
RF−IC Interface data in.
O RF−IC Interface data out (3-state).
O RF−IC Interface Enable (active HIGH, 3-state).
O Reference oscillator power-down (active LOW, 3-state).
1996 Oct 29
8