MAX155/MAX156
8-/4-Channel ADCs with Simultaneous
T/Hs and Reference
For this example, 6 write operations (with each
address and data setting in Table 5 above) load the
mux after power-up.
2) Sample all selected channels with a WR pulse (and
INH = 0), and update or rewrite any one location of
the configuration register.
This write operation may be skipped by loading INH with a
0 on the last WR of the above step. The conversion then
starts on the 6th WR. DIFF and SIP cannot be changed
on the 6th WR in the conversion is started at that time.
When the conversion starts, BUSY goes low while all
selected channels are sequentially converted. Conversion
results are stored in RAM and are ready to read when
BUSY returns high.
3) Data is read from RAM with INH = L and consecutive
RD strobes. Note that in the 6 channel configurations
described in this example (Figure 10), 6 RD pulses
access all available data, start with the differential
channel (1, 0). Additional RD pulses loop around,
accessing the lowest channel data again.
4) To start a new conversion cycle with the same mux
configuration, repeat steps 2 and 3.
SENSOR
2.5V
-1.75V
+5V
(-) 3 AIN
(1)
(+) 4
(0)
DIFFERENTIAL
BIPOLAR
2 (2) BIPOLAR
+24
VDD
0.1µF
21
REFOUT
22
REFIN
0.1µF
47µF
47µF
1 (3) BIPOLAR
MAX155
28 (4) BIPOLAR
27 (5) BIPOLAR
(+) 26 (6)
(-) 25 (7)
DIFFERENTIAL
UNIPOLAR
AGND DGND
23
14
0.1µF
11
CLK
CLOCK
5
MODE
7
CS
8
RD
9
WR
10
BUSY
20...15, 13, 12
8
D0–D7
DATA I/0 LINES
VSS
6
-5V
47µF
Figure 10. MAX155/MAX156 Typical Operating Circuit
www.maximintegrated.com
Maxim Integrated │ 18