R8830 데이터 시트보기 (PDF) - RDC Semiconductor
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R8830 Datasheet PDF : 97 Pages
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RDC®
RISC DSP Controller
R8830
9. Peripheral Control Block Register
The peripheral control block can be mapped into either memory or I/O space which is to program the FEh register. And it
starts at FF00h in I/O space when reset the microprocessor.
The following table is the definition of all the peripheral Control Block Register , and the detail description will arrange on
the relation Block Unit.
Offset
(HEX)
Register Name
FE Peripheral Control Block Relocation Register
F6 Reset Configuration Register
F4 Processor Release Level Register
F2 Serial Port Flow Control Register
F0 System configuration register
E6 Watchdog timer control register
E4 Enable RCU Register
E2 Clock Prescaler Register
E0 Memory Partition Register
DA DMA 1 Control Register
D8 DMA 1 Transfer Count Register
D6 DMA 1 Destination Address High Register
D4 DMA 1 Destination Address Low Register
D2 DMA 1 Source Address High Register
D0 DMA 1 Source Address Low Register
CA DMA 0 Control Register
C8 DMA 0 Transfer Count Register
C6 DMA 0 Destination Address High Register
C4 DMA 0 Destination Address Low Register
C2 DMA 0 Source Address High Register
C0 DMA 0 Source Address Low Register
A8 PCS and MCS Auxiliary Register
A6 Midrange Memory Chip Select Register
A4 Peripheral Chip Select Register
A2 Low Memory Chip Select Register
A0 Upper Memory Chip Select Register
88 Serial Port 0 Baud Rate Divisor Register
86 Serial Port 0 Receive Register
84 Serial Port 0 Transmit Register
82 Serial Port 0 Status Register
80 Serial Port 0 Control Register
7A PIO Data 1 Register
78 PIO Direction 1 Register
76 PIO Mode 1 Register
74 PIO Data 0 Register
72 PIO Direction 0 Register
Page
Offset
(HEX)
Register Name
Page
22
70 PIO Mode 0 Register
78
25
66 Timer 2 Mode / Control Register
64
22
62 Timer 2 Maxcount Compare A Register 65
30
60 Timer 2 Count Register
65
23
5E Timer 1 Mode / Control Register
62
67
5C Timer 1 Maxcount Compare B Register 64
79
5A Timer 1 Maxcount Compare A Register 64
79
58 Timer 1 Count Register
64
79
56 Timer 0 Mode / Control Register
61
55
54 Timer 0 Maxcount Compare B Register 62
57
52 Timer 0 Maxcount Compare A Register 62
57
50 Timer 0 Count Register
61
58
44 Serial Port 0 interrupt control register
40
58
42 Serial port 1 interrupt control register
41
58
40 INT4 Control Register
42
54
3E INT3 Control Register
42
54
3C INT2 Control Register
43
54
3A INT1 Control Register
43
55
38 INT0 Control Register
44
55
36 DMA 1/INT6 Interrupt Control Register 45
55
34 DMA 0/INT5 Interrupt Control Register 45
34
32 Timer Interrupt Control Register
46
33
30 Interrupt Status Register
46
35
2E Interrupt Request Register
47
32
2C Interrupt In-service Register
48
31
2A InterruptPriority Mask Register
49
74
28 Interrupt Mask Register
50
74
26 Interrupt Poll Status Register
51
73
24 Interrupt Poll Register
51
73
22 Interrupt End-of-Interrupt
51
71
20 Interrupt Vector Register
52
77
18 Serial port 1 baud rate divisor
75
77
16 Serial port 1 receive register
75
77
14 Serial port 1 transmit register
75
78
12 Serial port 1 status register
74
78
10 Serial port 1 control register
74
RDC Semiconductor Co.
Subject to change without notice
21
Rev:1.4
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