SP7800 데이터 시트보기 (PDF) - Signal Processing Technologies

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SP7800

12-Bit 3µs Sampling A/D Converter

Signal Processing Technologies 

Input Voltage Range Defined As:

Analog Input Connected to Pin

Pin Connected to GND

One Least Significant Bit (LSB)

INPUT VOLTAGE RANGE AND LSB VALUES

FSR/212

±10V

1

2

20V/212

4.88mV

FFEH TO FFFH

7FFH TO 800H

000H to 001H

OUTPUT TRANSITION VALUES

+ FULL SCALE

Mid Scale

(Bipolar Zero)

–Full Scale

+10V–3/2LSB

+9.9927V

0V–1/2LSB

–2.44mV

–10V+1/2LSB

-9.9976V

Table 2. Input Voltages, Transition Voltages and LSB Values

±5V

2

1

10V/212

2.44mV

+5V–3/2LSB

+4.9963V

0V–1/2LSB

–1.22mV

–5V+1/2LSB

-4.9988V

±5V Range Offset and Gain

Offset — Apply 1.5637V to the ±5V input at pin

2. Adjust the offset potentiometer until the LSB

toggles on and off at code 1010 1000 0000BIN =

A80H = 2688DEC.

Gain — Apply 4.9963V to the ±5V input at pin

2. Adjust the gain potentiometer until the LSB

toggles on and off at code 1111 1111 1110 =

BIN

FFE = 4094 .

H

DEC

±10V Range Offset and Gain

Offset — Apply 1.2622V to the ±10V input at

pin 1. Adjust the offset potentiometer until the

LSB toggles on and off at code 100100000010BIN

= 902H = 2306DEC.

Gain — Apply 9.9927V to the ±10V input at pin

1. Adjust the gain potentiometer until the LSB

toggles on and off at code 1111 1111 1110BIN =

FFEH = 4094DEC.

Layout Considerations

Because of the high resolution and linearity of the

SP7800A, system design problems such as ground

path resistance and contact resistance become very

important.

The input resistance of the SP7800A is 6.3kΩ or

4.2KΩ (for the ±10V and ±5V ranges respectively).

To avoid introducing distortion, the source resistance

must be very low, or constant with signal level. The

output impedance provided by most op amps is ideal.

Pins 23 (VSD) and 24 (VSA) are not connected internally

on the SP7800A, to maximize accuracy on the chip.

They should be connected together as close as pos-

sible to the unit. Pin 24 may be slightly more sensitive

than pin 23 to supply variations, but to maintain

GAIN ADJUST

±10V

Input R2=100Ω

+5V

R1=10KΩ

499Ω∗

10KΩ

100Ω

–15V

1 SP7800A

2

3

4

5

6

7

GAIN ADJUST

±5V

Input R2=100Ω

+5V

R1=10KW

1KΩ∗

30.1KΩ 301Ω

1 SP7800A

2

3

4

5

6

7

–15V

a)

BIPOLAR ZERO ADJUST

b)

∗ These resistors are different than those used with the ADS7800 Application Note.

These values will work with both the SP7800A and ADS7800.

Figure 3. a) ±10V Range b) ±5V Range — With External Trims

SP7800ADS/02

SP7800A 12-Bit 3µs Sampling A/D Converter

7

© Copyright 2000 Sipex Corporation

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