UDA1334BT 데이터 시트보기 (PDF) - Philips Electronics

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UDA1334BT

Low power audio DAC

Philips Electronics 

Philips Semiconductors

Low power audio DAC

Product specification

UDA1334BT

8.4 Filter stream DAC

The FSDAC is a semi-digital reconstruction filter that

converts the 1-bit data stream of the noise shaper to an

analog output voltage. The filter coefficients are

implemented as current sources and are summed at

virtual ground of the output operational amplifier. In this

way very high signal-to-noise performance and low clock

jitter sensitivity is achieved. No post-filter is needed due to

the inherent filter function of the DAC. On-board amplifiers

convert the FSDAC output current to an output voltage

signal capable of driving a line output.

The output voltage of the FSDAC scales proportionally

with the power supply voltage.

8.5 Power-on reset

The UDA1334BT has an internal Power-on reset circuit

(see Fig.3) which resets the test control block.

The reset time (see Fig.4) is determined by an external

capacitor which is connected between pin Vref(DAC) and

ground. The reset time should be at least 1 µs for

Vref(DAC) < 1.25 V. When VDDA is switched off, the device

will be reset again for Vref(DAC) < 0.75 V.

During the reset time the system clock should be running.

handbook, halfpage

3.0 V

VDDA

13

Vref(DAC) 12

C1 >

10 µF

50 kΩ

RESET

CIRCUIT

50 kΩ

UDA1334BT

MGU678

Fig.3 Power-on reset circuit.

3.0

handVbDooDk,Dhalfpage

(V)

1.5

0

t

3.0

VDDA

(V)

1.5

0

3.0

Vref(DAC)

(V)

1.5

1.25

0.75

0

>1 µs

Fig.4 Power-on reset timing.

t

t

MGL984

2002 May 22

8

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