UPD16835AGS-BGG 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD16835AGS-BGG

MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT

NEC => Renesas Technology 

µPD16835A

Cautions on Correct Use

(1) With this product, input the data for start up wait and start up drive wait. Because the standard data are

set or updated by these wait times, if the start up wait time and start up drive wait time are not input, the

data are not updated.

(2) The start up wait time must be longer than LATCH.

(3) If the rising of the start up drive wait time is the same as the falling of the last output pulse, a count error

occurs, and the IC may malfunction.

(4) Input the initial data in a manner that it does not straddle the video sync signal (VD). If it does, the initial

data is not latched.

(5) Transmit the standard data during the start up wait time (FF1). If it is input at any other time, the data

may

not be transmitted correctly.

(6) If the LGND potential is undefined, the data may not be input correctly. Keep the LGND potential to the

minimum level. It is recommended that LGND and PGND be divided for connection (single ground) to

prevent the leakage of noise from the output circuit.

Data Sheet S15973EJ1V0DS

21

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