UPD72012 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD72012

HUB CONTROLLER FOR UNIVERSAL SERIAL BUS

NEC => Renesas Technology 

PIN NAME

AGND1

AGND2

AVDD1

AVDD2

CLKSEL

CLK/X2

CS1

CS2

CS3

CS4

CS5

D10

D11

D20

D21

D30

D31

D40

µPD72012

: Analog GND1 (Xtal)

: Analog GND2 (DPLL)

: Analog VDD1 (Xtal)

: Analog VDD2 (DPLL)

: Clock Frequency Control

: 48 MHz OSC, 4 MHz Xtal

Clock Input

: Over Current Detect #1

: Over Current Detect #2

: Over Current Detect #3

: Over Current Detect #4

: Over Current Detect #5

: Downstream Port #1 D+

: Downstream Port #1 D–

: Downstream Port #2 D+

: Downstream Port #2 D–

: Downstream Port #3 D+

: Downstream Port #3 D–

: Downstream Port #4 D+

D41

D50

D51

DGND

DGND (Buffer)

DVDD

DVDD (Buffer)

OSL

PP1

PP2

PP3

PP4

PP5

PSSEL

PVSEL

RST

UD0

UD1

X1

: Downstream Port #4 D–

: Downstream Port #5 D+

: Downstream Port #5 D–

: Digital GND

: Digital GND (Buffer)

: Digital VDD

: Digital VDD (Buffer)

: OSC Suspend Output

: Port Power Control #1

: Port Power Control #2

: Port Power Control #3

: Port Power Control #4

: Port Power Control #5

: Powered Mode Control

: Down Port Value Control

: Reset

: Root Port #0 D+

: Root Port #0 D–

: 4 MHz Xtal Clock Input

Data Sheet S13918EJ3V0DS

5

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