WM8976 데이터 시트보기 (PDF) - Wolfson Microelectronics plc
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WM8976 Datasheet PDF : 108 Pages
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WM8976
CONTROL INTERFACE TIMING – 2-WIRE MODE
SDIN
SCLK
t3
t6
t1
t5
t2
t7
t9
t3
t4
Pre-Production
t8
Figure 6 Control Interface Timing – 2-Wire Serial Control Mode
Test Conditions
DCVDD=1.8V, DBVDD=AVDD=SPKVDD=3.3V, DGND=AGND=SPKGND=0V,
MCLK = 256fs, 24-bit data, unless otherwise stated.
TA=+25oC,
Slave
PARAMETER
Program Register Input Information
SCLK Frequency
SCLK Low Pulse-Width
SCLK High Pulse-Width
Hold Time (Start Condition)
Setup Time (Start Condition)
Data Setup Time
SDIN, SCLK Rise Time
SDIN, SCLK Fall Time
Setup Time (Stop Condition)
Data Hold Time
Pulse width of spikes that will be suppressed
SYMBOL
t1
t2
t3
t4
t5
t6
t7
t8
t9
tps
MIN
TYP
0
1.3
600
600
600
100
600
0
Mode,
MAX
526
300
300
900
5
fs=48kHz,
UNIT
kHz
us
ns
ns
ns
ns
ns
ns
ns
ns
ns
w
PP Rev 3.0 April 2006
18
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