WM8945ECS/R 데이터 시트보기 (PDF) - Wolfson Microelectronics plc

부품명

상세내역

제조사

WM8945ECS/R

Mono Low-Power CODEC with Video Buffer and Touch Panel Controller

Wolfson Microelectronics plc 

Production Data

WM8945

Figure 8 Control Interface Timing – 4-wire (SPI) Control Mode (Write Cycle)

Note: The data is latched on the 32nd falling edge of SCLK after 32 bits have been clocked into the device.

CS

(input)

SCLK

(input)

SDOUT

(output)

tDL

Figure 9 Control Interface Timing – 4-wire (SPI) Control Mode (Read Cycle)

Test Conditions

DCVDD = 1.8V, DBVDD = LDOVDD = SPKVDD = 3.3V, LDOVOUT = 3.0V, GND = 0V,

TA = +25oC, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.

PARAMETER

C¯¯S falling edge to SCLK rising edge

SCLK falling edge to CS rising edge

SCLK pulse cycle time

SCLK pulse width low

SCLK pulse width high

SDA to SCLK set-up time

SDA to SCLK hold time

Pulse width of spikes that will be suppressed

SCLK falling edge to SDOUT transition

SYMBOL

tCSU

tCHO

tSCY

tSCL

tSCH

tDSU

tDHO

tps

tDL

MIN

TYP

40

10

200

80

80

40

10

0

MAX

5

40

UNIT

ns

ns

ns

ns

ns

ns

ns

ns

ns

w

PD, May 2011, Rev 4.1

21

Share Link: