Philips Semiconductors
Digital TV sound demodulator/decoder
Preliminary specification
TDA9874A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Z(Vref2-VSSA3) impedance Vref2 to VSSA3
Digital inputs and outputs
−
20
−
kΩ
INPUTS
CMOS level input, high drive, pull-down (pins TEST1, TEST2, TP1 and TP2)
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
Ci
input capacitance
Zi
input impedance
CMOS level input, hysteresis, high drive, pull-up (pin CRESET)
−
−
0.7VDDD −
−
−
−
50
0.3VDDD V
−
V
10
pF
−
kΩ
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
Vhys
hysteresis voltage
Ci
input capacitance
Zi
input impedance
INPUTS/OUTPUTS
−
−
0.7VDDD −
−
1.3
−
−
−
50
0.3VDDD V
−
V
−
V
10
pF
−
kΩ
I2C-bus level input with Schmitt trigger, open-drain output stage (pins SCL and SDA)
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
Vhys
hysteresis voltage
ILI
input leakage current
Ci
input capacitance
VOL
LOW-level output voltage
CL
load capacitance
−
−
0.3VDDD V
0.7VDDD −
−
V
−
0.05VDDD −
V
−
−
±10
µA
−
−
10
pF
−
−
0.6
V
−
−
400
pF
TTL/CMOS level, high drive, 4 mA 3-state output stage, pull-up (pins PCLK, NICAM, ADDR1, ADDR2, P1, P2, SCK,
WS and SDO)
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
Ci
input capacitance
VOL
LOW-level output voltage
IOL = 3 mA
VOH
HIGH-level output voltage
IOH = −3 mA
CL
load capacitance
active pull-up
Zi
input impedance
−
−
2.0
−
−
−
−
−
2.4
−
−
−
−
50
0.8
V
−
V
10
pF
0.4
V
−
V
100
pF
−
kΩ
OUTPUTS
4 mA 3-state output stage (pin SYSCLK)
VOL
VOH
CL
ILO(Z)
LOW-level output voltage
HIGH-level output voltage
load capacitance
3-state leakage current
IOL = 2 mA
IOH = −2 mA
Vi = 0 to VDDD
−
−
0.7VDDD −
−
−
−
−
0.3VDDD V
−
V
100
pF
±10
µA
1999 Dec 03
18