M38749M6F-GP 데이터 시트보기 (PDF) - Mitsumi

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M38749M6F-GP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Mitsumi 

MITSUBISHI MICROCOMPUTERS

3874 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Key Input Interrupt

A Key input interrupt request is generated by applying “L” level to

any pin of por t P2 that have been set to input mode. In other

words, it is generated when AND of input level goes from “1” to “0”.

An example of using a key input interrupt is shown in Figure 21,

where an interrupt request is generated by pressing one of the

keys consisted as an active-low key matrix which inputs to ports

P20–P24.

Port PXx

“L” level output

P27 output

PULL UP register

Bit 0 = “0”

Port P27

direction register = “1”

V

VV Port P27

latch

P26 output

P25 output

P24 input

Port P26

direction register = “1”

V

VV Port P26

latch

PULL UP register

Bit 1 = “0”

Port P25

direction register = “1”

V

VV Port P25

latch

PULL UP register

Bit 2 = “1”

Port P24

direction register = “0”

V

VV Port P24

latch

V

P23 input

Port P23

direction register = “0”

VV Port P23

latch

P22 input

P21 input

Port P22

direction register = “0”

V

VV Port P22

latch

PULL UP register

Bit 3 = “1”

Port P21

direction register = “0”

V

VV Port P21

latch

V

P20 input

Port P20

direction register = “0”

VV Port P20

latch

Key input interrupt request

Port P2

Input reading circuit

V P-channel transistor for pull-up

VV CMOS output buffer

Fig. 21 Connection example when using key input interrupt and port P2 block diagram

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