T2316407A-10 데이터 시트보기 (PDF) - Taiwan Memory Technology

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T2316407A-10

4M x 4 DYNAMIC RAM EDO PAGE MODE

Taiwan Memory Technology 

tm TE

CH

BLOCK DIAGRAM

T2316405A

Preliminary T2316407A

WE

CAS

NO.2 CLOCK

GENERATOR

COLUMN-

11 ADDRESS

BUFFER(11)

A0

A1

REFRESH

A2

CONTROLLER

A3

A4

A5

REFRESH

A6

COUNTER

A7

A8

11

A9

A10

ROW-

11 ADDRESS

BUFFERS (11)

CONTROL

LOGIC

10

1

DATA-IN

BUFFER

4

IO1

IO2

IO3

DATA-OUT

4

IO4

BUFFER

4

OE

COLUMN

DECODER

1024

4

SENSE AMPLIFIERS

I/O GATING

1024

2048

2048

4096 x 1024 x 4

11

2048

2048

MEMORY

2048

ARRAY

RAS

NO.1 CLOCK

GENERATOR

PIN DESCRIPTION

PIN NO.

8~12,15~19,21

5

23

4

22

2,3,24,25

1,13

14,26

6

SYM.

A0-A10

RAS

CAS

WE

OE

I/O1 -I/O4

Vcc

Vss

NC

Vcc

Vss

TYPE

Input

Input

Input

Input

Input

Input/ Output

Supply

Ground

DESCRIPTION

Address Input

Row Address Strobe

Column Address Strobe

Write Enable

Output Enable

Data Input/ Output

Power

Ground

No Connect

Taiwan Memory Technology, Inc. reserves the right P. 2

to change products or specifications without notice.

Publication Date: APR 2001

Revision:0.B

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