PIN DIAGRAM (MST703)
MST703
Small Size LCD TV Processor with Video Decoder
Preliminary Data Sheet Version 0.1
AVDD_ANA 1
75 GOUT[7]/TCON[4]
BIN0/PBIN0 2
74 GOUT[6]/TCON[5]
SOG0 3
Pin 1
73 GOUT[5]
GIN0/YIN0 4
72 GOUT[4]
RGBINM0 5
71 GOUT[3]
RIN0/PRIN0 6
70 GOUT[2]
HSYNCIN 7
69 GOUT[1]
VSYNCIN 8
68 GOUT[0]
AGND 9
67 ROUT[7]/TCON[6]
BIN1/PBIN1 10
66 ROUT[6]/TCON[7]
Mstar Confidential RGBINM1 11
GIN1/YIN1 12
SOG1 13
65 ROUT[5]
64 ROUT[4]
63 ROUT[3]
RIN1/PRIN1 14
62 ROUT[2]
for 深圳市江启科技有限公司 VCOM0 15
CVBS1/SC0 16
61 ROUT[1]
60 ROUT[0]
CVBS2/SY0 17
59 GND
Internal Use Only CVBS3/SC1 18
CVBS4/SY1 19
GND 20
58 VDDP
57 VDDC
56 HSYNCO/TCON[8]
DPWM_IFB 21
55 VSYNCO/TCON[9]
DPWM_QOR 22
54 DEO/TCON[10]
VDDP 23
53 CLKO
CP_N 24
52 RESET
CP_P 25
51 PWM1D
-4-
Copyright © 2010 MStar Semiconductor, Inc. All rights reserved.
11/24/2010
Free Datasheet http://www.datasheet4u.net/