FL7930CMX_G 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FL7930CMX_G

Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting

Fairchild Semiconductor 

Application Diagram

DC OUTPUT

Vcc

line filter

AC INPUT

PFC

ready

FL7930C

8 VCC

5 ZCD

3 COMP

2 RDY

Out 7

CS 4

INV 1

GND

6

Figure 1. Typical Boost PFC Application

Internal Block Diagram

VCC

VREF

VBIAS

VCC

2.5VREF

H:open

Internal

Bias

reset

ZCD 5

-

+

VTH(ZCD)

THD

Optimized

Sawtooth

Generator

Control Range

Compensation

+

-

Overshoot-less

Control

Restart

Timer

fMAX

limit

SQ

RQ

INV 1

COMP 3

RDY 2

VREF

VREF

Stair

Step

-

+

Clamp

Circuit

reset

VIN Absent

-

+

INV_open

OVP

UVLO

disable

0.35 0.45

VBIAS

2.051 2.240

disable

2.5 2.675

8.5 12

8 VCC

-

VZ

+

VTH(S/S)

VCC

Gate

Driver

VO(MAX)

7 OUT

+

-

VCS_LIM

40kW

8pF

4 CS

6 GND

Thermal

Shutdown

Figure 2. Functional Block Diagram

© 2011 Fairchild Semiconductor Corporation

FL7930C • Rev. 1.0.2

2

www.fairchildsemi.com

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