V58C265164S-55 데이터 시트보기 (PDF) - Mosel Vitelic, Corp

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V58C265164S-55

64 Mbit DDR SDRAM 2.5 VOLT 4M X 16

Mosel Vitelic, Corp 

MOSEL VITELIC

66 Pin Plastic TSOP-II

PIN CONFIGURATION

Top View

VDD

DQ0

VDDQ

DQ1

DQ2

VSSQ

DQ3

DQ4

VDDQ

DQ5

DQ6

VSSQ

DQ7

NC

VDDQ

LDQS

NC

VDD

NC

LDM

WE

CAS

RAS

CS

NC

BA0

BA1

A10/AP

A0

A1

A2

A3

VDD

1

66

2

65

3

64

4

63

5

62

6

61

7

60

8

59

9

58

10

57

11

56

12

55

13

54

14

64M

53

15 DDR SDRAM 52

16

51

17

50

18

49

19

48

20

47

21

46

22

45

23

44

24

43

25

42

26

41

27

40

28

39

29

38

30

37

31

36

32

35

33

34

VSS

DQ15

VSSQ

DQ14

DQ13

VDDQ

DQ12

DQ11

VSSQ

DQ10

DQ9

VDDQ

DQ8

NC

VSSQ

UDQS

NC

VREF

VSS

UDM

CLK

CLK

CKE

NC

NC

A11

A9

A8

A7

A6

A5

A4

VSS

Pin Names

CLK, CLK

CKE

CS

RAS

CAS

WE

UDQS, LDQS

A0–A11

BA0, BA1

DQ0–DQ15

UDM, LDM

VDD

VSS

VDDQ

VSSQ

NC

VREF

V58C265164S

Differential Clock Input

Clock Enable

Chip Select

Row Address Strobe

Column Address Strobe

Write Enable

Data Strobe (Bidirectional)

Address Inputs

Bank Select

Data Input/Output

Data Mask

Power (+2.5V)

Ground

Power for I/O’s (+2.5V)

Ground for I/O’s

Not connected

Reference Voltage for Inputs

V58C265164S Rev. 1.7 August 2001

2

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