TDA7502 데이터 시트보기 (PDF) - STMicroelectronics
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TDA7502 Datasheet PDF : 25 Pages
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TDA7502
Block diagram and PIN description
Table 1. Pin description (continued)
N.
Name
Type
Reset
status
Function
23
LRCKR
I/O
– Left-right clock for SAI Receiver. Master or slave.
24
SCKR
I/O
– SAI receive bit clock. Master or slave.
25
VDD4
P
– 3.3V supply.
26
GND4
G
– Ground.
27
SDO0
O High SDO0 is a stereo digital audio data output pin channel 0.
28
SDO1
O High SDO1 is a stereo digital audio data output pin channel 1.
29
SDO2
O High SDO2 is a stereo digital audio data pin channel 2.
30
VDD5
P
– 3.3V supply.
31
GND5
G
– Ground.
32
LRCKT
I/O
– SAI transmit left/right clock. Master or slave.
33
SCKT
I/O
– SAI transmit bit clock. Master or slave.
34
SCL
I/O
– Clock line for I2C bus. Schmitt trigger input.
35
SDA
I/O
– Data line for I2C bus. Schmitt trigger input.
36
SCK
I
– Bit clock for SPI control interface.
37
SS
I
– Slave select input pin for SPI control interface.
Serial data output for SPI type serial port when in SPI
38
MOSI
I/O
– master mode and serial data input when in SPI slave
mode.
Serial data input for SPI style serial port when in SPI
39
MISO
I/O
– master mode and serial data output when in SPI slave
mode.
40
VDD6
P
– 3.3V supply.
41
GND6
G
– Ground.
42
GPIO3
I/O
– This pin is dedicated as general I/O.
43
GPIO4
I/O
– This pin is dedicated as general I/O.
44
GPIO5
I/O
– This pin is dedicated as general I/O.
1. XTI and XTO are not 5V tolerant
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