MU9C8338A 데이터 시트보기 (PDF) - MUSIC Semiconductors
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MU9C8338A Datasheet PDF : 32 Pages
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Applications
MU9C8338A 10/100Mb Ethernet Filter Interface
Table 29: Add Permanent Entry Routine
Line /CM /W /E Cycle
1
H
L
Short
2
H
L
Short
3
H
L
Short
4
H
L
Short
5
L
L
Long
/EC
Mnemonic
H
H
H
H
H
MOV_NF,CR,V
DQ(15:0)
ddddH
ddddH
ddddH
ddddH
0334H
Description
Write Perm Bit and Port ID to Segment 0
Write 1st 16 bits to Segment 1
Write 2nd 16 bits to Segment 2
Write 3rd 16 bits to Segment 3
Move to Next Free
Table 30: Delete Entry Routine
Line /CM /W /E Cycle
/EC
1
H
L
Short
H
2
H
L
Short
H
3
H
L
Short
H
4
H
L
Short
L
5
L
L
Long
H
Mnemonic
VBC_HM,E
DQ(15:0)
xxxxH
ddddH
ddddH
ddddH
042DH
Description
Dummy Write to Segment 0
Write 1st 16 bits to Segment 1
Write 2nd 16 bits to Segment 2
Write 3rd 16 bits to Segment 3 and compare
Set Highest Match to “Empty”
Table 31: Set Address Register Routine
Line /CM /W /E Cycle
/EC
Mnemonic
1
L
L
Short
H
SBR
2
L
L
Short
H
TCO_AR
3
L
L
Short
H
4
L
L
Short
H
SFR
DQ(15:0)
0619H
0220H
aaaaH
0618H
Description
Select Background Register set
Target Address register
Address value
Select Foreground Register set
Table 32: Read Entries Routine
Line /CM /W /E Cycle
/EC
1
L
L
Short
H
2
L
L
Short
H
3
L
L
Short
H
4
H
H
Long
H
5
H
H
Long
H
6
H
H
Long
H
7
H
H
Long
H
8
L
H
Med
H
9
L
H
Med
H
10
L
L
Short
H
11
L
L
Short
H
12
L
L
Short
H
Mnemonic
SBR
TCO_DS
TCO_DS
SFR
DQ(15:0)
0619H
0228H
ppppH
ddddH
ddddH
ddddH
ddddH
ddddH
ddddH
0228H
FFFFH
0618H
Description
Select Background Register set
Target Device Select register
Page Address value
Data Read, Segment 0
Data Read, Segment 1
Data Read, Segment 2
Data Read, Segment 3
Command Read, Status Register bits 15:0
Command Read, Status Register bits 31:16
Target Device Select register
Select all devices
Select Foreground Register set
Rev. 0a
21
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