MU9C8338A 데이터 시트보기 (PDF) - MUSIC Semiconductors
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MU9C8338A Datasheet PDF : 32 Pages
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Timing Diagrams
Capacitance
Symbol Parameter
CIN
Input Capacitance
COUT Output Capacitance
CI0
Bi-directional Capacitance
MU9C8338A 10/100Mb Ethernet Filter Interface
Typ
Units Notes
6
pF
f = 1 MHz, VIN = 0 V
9
pF
f = 1 MHz, VOUT = 0 V
10
pF
f = 1 MHz, VI0 = 0 V
TIMING DIAGRAMS
Host Processor
Table 33: Host Processor Interface Timing Data
No.
Symbol
Parameter (ns)
1
tPLDX
/PCS (/PCSS) LOW to D(15:0) enable
2
tPHDZ
/PCS (/PCSS) HIGH to D(15:0) disable
3
tWVPL
/WRITE setup to /PCS (/PCSS)
4
tPLWX
/WRITE hold from /PCS (/PCSS)
5
tCHDV
SYSCLK HIGH to D(15:0) (read)
6
tDVPH
D(15:0) setup to /PCS (/PCSS) HIGH (write)
7
tPHDX
D(15:0) hold from /PCS (/PCSS) HIGH (write)
8
tCHPRH
PROC_RDY delay from SYSCLK HIGH
9
tAVPL
A(7:0) setup to /PCS (/PCSS) LOW
10
tPLAX
A(7:0) hold from /PCS (/PCSS) LOW
11
tPHPL
/PCS (/PCSS) HIGH time
12
tPLPRL
/PCS (/PCSS) to PROC_RDY LOW
13
tPRHPRL
PROC_RDY HIGH time
Min
3
3
5
3
5
3
2*SYSCLK+8
10
1*SYSCLK
Max
SYSCLK+5
SYSCLK+5
Notes
10
10
/PCS (/PCSS)
D[15:0](read)
A[7:0]
/WRITE (read)
PROC_RDY
SYSCLK
t3
t9
t1
t10
t4
t12
t5
t8
t13
t11
t2
Figure 7: Host Processor Interface - Read Sequence
Rev. 0a
23
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