FOD8333 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FOD8333

Input LED Drive, 2.5 A Output Current, IGBT Drive Optocoupler with Desaturation Detection, Isolated Fault Sensing, Active Miller Clamp, and Automatic Fault Reset

Fairchild Semiconductor 

Switching Characteristics

Apply over all recommended conditions; typical value is measured at VCC = 5 V, VDD – VSS = 30 V, VE – VSS = 0 V, and

TA = 25°C; unless otherwise specified.

Symbol

Parameter

Conditions

Min. Typ. Max. Units Figure

tPHL

Propagation Delay to Logic

Low Output(18)

tPLH

Propagation Delay to Logic

High Output(19)

PWD

PDD Skew

tR

Pulse Width Distortion,

| tPHL – tPLH|(20)

Propagation Delay Difference

Between Any Two Parts or

Channels, ( tPHL – tPLH)(21)

Output Rise Time

(10% to 90%)

tF

Output Fall Time

(90% to 10%)

tDESAT(LOW) DESAT Sense to DESAT Low

Propagation Delay(24)

tDESAT(90%) DESAT Sense to 90% VO

Delay(22)

tDESAT(10%) DESAT Sense to 10% VO

Delay(22)

tDESAT(FAULT) DESAT Sense to Low Level

FAULT Signal Delay(23)

tDESAT(MUTE)

tUVLO ON

tUVLO OFF

tGP

DESAT Input Mute

UVLO Turn-On Delay(25)

UVLO Turn-Off Delay(26)

Time-to-Good Power(27)

| CMH |

Common Mode Transient

Immunity at Output High

| CML |

Common Mode Transient

Immunity at Output Low

Rg = 10 Ω, Cg =10 nF,

f = 10 kHz,

Duty Cycle = 50%,

IF = 10 mA,

VDD – VSS = 30 V(17)

Rg = 10 Ω, Cg = 10 nF,

VDD – VSS = 30 V

(CDESAT = 100pF,

RF = 4.7 kΩ, VCC = 5.5 V)

VDD = 20 V in 1.0 ms

Ramp

VDD = 0 to 30 V in 10 µs

Ramp

TA = 25˚C, VCC = 5 V,

VDD = 25 V, VSS = Ground,

CF = 15 pF, RF = 4.7 kΩ,

VCM = 1500 VPEAK(28)

TA = 25˚C, VCC = 5 V,

VDD = 25 V, VSS = Ground,

CF = 15 pF, RF = 4.7 kΩ,

VCM = 1500 VPEAK(29)

100

100

-150

20

35

35

135

150

15

50

50

0.25

0.45

2.8

0.5

33

4.0

4.0

2

50

50

250

250

100

150

0.70

4.0

1.5

45

ns 18, 19,

20, 21,

ns

47

ns

47

ns

ns

47

ns

µs

µs

22, 48

µs 23, 24,

25, 48

µs

26, 48

µs

µs

µs

µs

kV/µs

48

49

28, 29,

49

51, 52

kV/µs 50, 53

Notes:

17. This load condition approximates the gate load of a 1200 V / 150 A IGBT.

18. Propagation delay tPHL is measured from the 50% level on the falling edge of the input pulse to the 50% level of the

falling edge of the VO signal.

19. Propagation delay tPLH is measured from the 50% level on the rising edge of the input pulse to the 50% level of the

rising edge of the VO signal.

20. PWD is defined as | tPHL – tPLH | for any given device.

21. The difference between tPHL and tPLH between any two parts under same operating conditions with equal loads.

22. The length of time the DESAT threshold must be exceeded before VO begins to go LOW. This is supply voltage

dependent.

©2014 Fairchild Semiconductor Corporation

FOD8333 Rev. 1.0.3

9

www.fairchildsemi.com

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