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74LVC08APW 데이터 시트보기 (PDF) - NXP Semiconductors.

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74LVC08APW
NXP
NXP Semiconductors. 
74LVC08APW Datasheet PDF : 15 Pages
First Prev 11 12 13 14 15
Nexperia
74LVC08A
Quad 2-input AND gate
13. Abbreviations
Table 9. Abbreviations
Acronym
Description
CDM
Charged Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 10. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74LVC08A v.7
Modifications:
20160419
Product data sheet
74LVC08A v.6
Table 2: Pin description for 1A to 4A inputs and 1Y to 4Y outputs swapped (errata).
74LVC08A v.6
Modifications:
20111216
Product data sheet
74LVC08A v.5
The format of this document has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Table 4, Table 5, Table 6, Table 7 and Table 8: values added for lower voltage ranges.
74LVC08A v.5
20030224
Product specification -
74LVC08A v.4
74LVC08A v.4
20021030
Product specification -
74LVC08A v.3
74LVC08A v.3
20020308
Product specification -
74LVC08A v.2
74LVC08A v.2
19970630
Product specification -
74LVC08A v.1
74LVC08A v.1
19970630
Product specification -
-
74LVC08A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 19 April 2016
© Nexperia B.V. 2017. All rights reserved
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