ADAU1450WBCPZ-RL 데이터 시트보기 (PDF) - Analog Devices
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ADAU1450WBCPZ-RL Datasheet PDF : 180 Pages
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Data Sheet
ADAU1452/ADAU1451/ADAU1450
AVDD = 3.3 V ± 10%, DVDD = 1.2 V ± 5%, PVDD = 3.3 V ± 10%, IOVDD = 1.8 V − 10% to 3.3 V + 10%, TA = −40°C to +105°C, master
clock input = 12.288 MHz, core clock (fCORE) = 294.912 MHz, I/O pins set to low drive setting, unless otherwise noted.
Table 3.
Parameter
Min Typ Max Unit Test Conditions/Comments
POWER
Supply Voltage
Analog Voltage (AVDD)
2.97 3.3 3.63 V Supply for analog circuitry, including auxiliary ADC
Digital Voltage (DVDD)
1.14 1.2 1.26 V
Supply for digital circuitry, including the DSP core, ASRCs, and signal
routing
PLL Voltage (PVDD)
2.97 3.3 3.63 V Supply for PLL circuitry
IOVDD Voltage (IOVDD)
1.71 3.3 3.63 V Supply for input/output circuitry, including pads and level shifters
Supply Current
Analog Current (AVDD)
1.44 1.72 2
mA
Idle State
0
6.3 40
µA
Reset State
0.26 7.1 40
µA
PLL Current (PVDD)
6
10.9 15
mA 12.288 MHz master clock; default PLL settings
Idle State
0
7.8 40
µA Power applied, PLL not configured
Reset State
1.2 9.3 40
µA Power applied, RESET held low
I/O Current (IOVDD)
Dependent on the number of active serial ports, clock pins, and
characteristics of external loads
Operation State
47
mA IOVDD = 3.3 V; all serial ports are clock masters
15
mA IOVDD = 1.8 V; all serial ports are clock masters
Power-Down State
1.3 2.2
mA IOVDD = 1.8 V − 10% to 3.3 V + 10%
Digital Current (DVDD)
Operation State, ADAU1452
Maximum Program
500 690 mA
Typical Program
200
mA Test program includes 16-channel I/O, 10-band EQ per channel,
all ASRCs active
Minimal Program
160
mA Test program includes 2-channel I/O, 10-band EQ per channel
Operation State, ADAU1451
Maximum Program
500 690 mA
Typical Program
200
mA Test program includes 16-channel I/O, 10-band EQ per channel,
all ASRCs active
Minimal Program
160
mA Test program includes 2-channel I/O, 10-band EQ per channel
Operation State, ADAU1450
Maximum Program
270 635 mA fCORE = 147.456 MHz
Typical Program
110
mA Test program includes 16-channel I/O, 10-band EQ per channel,
fCORE = 147.456 MHz
Minimal Program
90
mA Test program includes 2-channel I/O, 10-band EQ per channel,
fCORE = 147.456 MHz
Idle State
315 635 mA
Reset State
315 635 mA
ASYNCHRONOUS SAMPLE RATE
CONVERTERS
Dynamic Range
139
dB A-weighted, 20 Hz to 20 kHz
I/O Sample Rate
6
192 kHz
I/O Sample Rate Ratio
1:8
7.75:1
THD + N
−120 dB
CRYSTAL OSCILLATOR
Transconductance
8.1 10.6 14.6 mS
REGULATOR
DVDD Voltage
1.14 1.2
V Regulator maintains typical output voltage up to a maximum 800 mA
load; IOVDD = 1.8 V − 10% to 3.3 V + 10%
Rev. C | Page 7 of 180
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