DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ADE7854 데이터 시트보기 (PDF) - Analog Devices

부품명
상세내역
제조사
ADE7854 Datasheet PDF : 100 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADE7854/ADE7858/ADE7868/ADE7878
Data Sheet
Parameter1, 2
MEAN ABSOLUTE VALUE (MAV)
MEASUREMENT (ADE7868 AND
ADE7878)
I mav Measurement Bandwidth (PSM1
Mode)
I mav Measurement Error (PSM1 Mode)
ANALOG INPUTS
Maximum Signal Levels
Input Impedance (DC)
IAP, IAN, IBP, IBN, ICP, ICN, VAP, VBP,
and VCP Pins
VN Pin
ADC Offset
Gain Error
WAVEFORM SAMPLING
Current and Voltage Channels
Signal-to-Noise Ratio, SNR
Signal-to-Noise-and-Distortion Ratio,
SINAD
Bandwidth (−3 dB)
TIME INTERVAL BETWEEN PHASES
Measurement Error
CF1, CF2, CF3 PULSE OUTPUTS
Maximum Output Frequency
Duty Cycle
Active Low Pulse Width
Jitter
REFERENCE INPUT
REFIN/OUT Input Voltage Range
Input Capacitance
ON-CHIP REFERENCE
PSM0 and PSM1 Modes
Temperature Coefficient
CLKIN
Input Clock Frequency
LOGIC INPUTS—MOSI/SDA, SCLK/SCL, SS,
RESET, PM0, AND PM1
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
Min Typ
260
0.5
Max Unit
Hz
%
±500 mV peak
400
130
−24
±4
74
74
2
0.3
8
50
(1 + 1/CFDEN)
× 50%
80
0.04
kΩ
kΩ
mV
%
dB
dB
kHz
Degrees
kHz
%
ms
%
1.1
−50 ±5
1.3
V
10
pF
+50 ppm/°C
16.22 16.384
16.55 MHz
2.0
10
V
0.8
V
−8.7 µA
3
μA
pF
Rev. H | Page 10 of 100
Test Conditions/Comments
Over a dynamic range of 100 to 1, PGA = 1, 2, 4, 8
PGA = 1, differential inputs between the
following pins: IAP and IAN, IBP and IBN, ICP
and ICN; single-ended inputs between the
following pins: VAP and VN, VBP and VN, VCP,
and VN
PGA = 1, uncalibrated error, see the Terminology
section
External 1.2 V reference
Sampling CLKIN/2048, 16.384 MHz/2048 = 8 kSPS
See the Waveform Sampling Mode section
PGA = 1, fundamental frequency: 45 Hz to
65 Hz, see the Terminology section
PGA = 1; fundamental frequency: 45 Hz to
65 Hz, see the Terminology section
Line frequency = 45 Hz to 65 Hz, HPF on
WTHR = VARTHR = VATHR = PMAX = 33,516,139
If CF1, CF2, or CF3 frequency > 6.25 Hz and
CFDEN is even and > 1
If CF1, CF2, or CF3 frequency > 6.25 Hz and
CFDEN is odd and > 1
If CF1, CF2, or CF3 frequency < 6.25 Hz
For CF1, CF2, or CF3 frequency = 1 Hz and
nominal phase currents are larger than 10% of
full scale
Minimum = 1.2 V − 8%; maximum = 1.2 V + 8%
Nominal 1.2 V at the REFIN/OUT pin at TA = 25°C
Drift across the entire temperature range of −40°C
to +85°C is calculated with reference to 25°C;
see the Reference Circuit section for more details
All specifications CLKIN of 16.384 MHz. See the
Crystal Circuit section for more details.
VDD = 3.3 V ± 10%
VDD = 3.3 V ± 10%
Input = 0 V, VDD = 3.3 V
Input = VDD = 3.3 V

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]