WM8960CGEFL/V 데이터 시트보기 (PDF) - Cirrus Logic

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WM8960CGEFL/V

Stereo CODEC with 1W Stereo Class D Speaker Drivers and Headphone Drivers for Portable Audio Applications

Cirrus Logic 

Production Data

WM8960

REGISTER

ADDRESS

R17 (11h)

ALC Control

(1)

BIT

LABEL

8:7 ALCSEL

[1:0]

6:4 MAXGAIN

[2:0]

3:0 ALCL

[3:0]

R18 (12h)

ALC Control

(2)

6:4 MINGAIN

[2:0]

3:0 HLD

[3:0]

R19 (13h)

ALC Control

(3)

8

ALCMODE

7:4 DCY

[3:0]

3:0 ATK

[3:0]

DEFAULT

DESCRIPTION

00

(OFF)

111

(+30dB)

1011

(-12dB)

000

0000

(0ms)

0

0011

(192ms)

0010

(24ms)

ALC Function Select

00 = ALC off (PGA gain set by register)

01 = Right channel only

10 = Left channel only

11 = Stereo (PGA registers unused)

Note: ensure that LINVOL and

RINVOL settings (reg. 0 and 1) are

the same before entering this mode.

Set Maximum Gain of PGA

111 : +30dB

110 : +24dB

….(-6dB steps)

001 : -6dB

000 : -12dB

ALC Target (Sets signal level at ADC

input)

0000 = -22.5dB FS

0001 = -21.0dB FS

… (1.5dB steps)

1101 = -3.0dB FS

1110 = -1.5dB FS

1111 = -1.5dB FS

Set Minimum Gain of PGA

000 = -17.25dB

001 = -11.25dB

010 = -5.25dB

011 = +0.75dB

100 = +6.75dB

101 = +12.75dB

110 = +18.75dB

111 = +24.75dB

ALC hold time before gain is increased.

0000 = 0ms

0001 = 2.67ms

0010 = 5.33ms

… (time doubles with every step)

1111 = 43.691s

Determines the ALC mode of operation:

0 = ALC mode

1 = Limiter mode

ALC decay (gain ramp-up) time

0000 = 24ms

0001 = 48ms

0010 = 96ms

… (time doubles with every step)

1010 or higher = 24.58s

ALC attack (gain ramp-down) time

0000 = 6ms

0001 = 12ms

0010 = 24ms

… (time doubles with every step)

1010 or higher = 6.14s

w

PD, August 2013, Rev 4.2

29

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