SC16IS740 데이터 시트보기 (PDF) - NXP Semiconductors.

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SC16IS740

Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support

NXP Semiconductors. 

NXP Semiconductors

SC16IS740/750/760

Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR

XTAL1

XTAL2

1.8432 MHz

C1

22 pF

C2

33 pF

002aab402

Fig 16. Crystal oscillator circuit reference

8. Register descriptions

SC16IS740_750_760

Product data sheet

The programming combinations for register selection are shown in Table 9.

Table 9. Register map - read/write properties

Register name Read mode

RHR/THR

Receive Holding Register (RHR)

IER

Interrupt Enable Register (IER)

IIR/FCR

Interrupt Identification Register (IIR)

LCR

Line Control Register (LCR)

MCR

Modem Control Register (MCR)[1]

LSR

Line Status Register (LSR)

MSR

Modem Status Register (MSR)

SPR

Scratchpad Register (SPR)

TCR

Transmission Control Register (TCR)[2]

TLR

Trigger Level Register (TLR)[2]

TXLVL

Transmit FIFO Level Register

RXLVL

Receive FIFO Level Register

IODir[3]

I/O pin Direction Register

IOState[3]

I/O pin States Register

IOIntEna[3]

I/O Interrupt Enable Register

IOControl[3]

I/O pins Control Register

EFCR

Extra Features Register

DLL

divisor latch LSB (DLL)[4]

DLH

divisor latch MSB (DLH)[4]

EFR

Enhanced Feature Register (EFR)[5]

XON1

Xon1 word[5]

XON2

Xon2 word[5]

XOFF1

Xoff1 word[5]

XOFF2

Xoff2 word[5]

Write mode

Transmit Holding Register (THR)

Interrupt Enable Register

FIFO Control Register (FCR)

Line Control Register

Modem Control Register[1]

n/a

n/a

Scratchpad Register

Transmission Control Register[2]

Trigger Level Register[2]

n/a

n/a

I/O pin Direction Register

n/a

I/O Interrupt Enable Register

I/O pins Control Register

Extra Features Register

divisor latch LSB[4]

divisor latch MSB[4]

Enhanced Feature Register[5]

Xon1 word[5]

Xon2 word[5]

Xoff1 word[5]

Xoff2 word[5]

[1] MCR[7] can only be modified when EFR[4] is set.

[2] Accessible only when ERF[4] = 1 and MCR[2] = 1, that is, EFR[4] and MCR[2] are read/write enables.

[3] Available only on SC16IS750/SC16IS760.

[4] Accessible only when LCR[7] is logic 1.

[5] Accessible only when LCR is set to 1011 1111b (0xBF).

All information provided in this document is subject to legal disclaimers.

Rev. 7 — 9 June 2011

© NXP B.V. 2011. All rights reserved.

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