HEF4013B-Q100 데이터 시트보기 (PDF) - NXP Semiconductors.
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HEF4013B-Q100 Datasheet PDF : 16 Pages
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NXP Semiconductors
HEF4013B-Q100
Dual D-type flip-flop
VI
input nCP
0V
VI
input nSD
0V
VI
input nCD
0V
VOH
output nQ
VOL
VM
tW
VM
trec
trec
VM
tW
001aag088
Fig 5.
Recovery times are shown as positive values but may be specified as negative values.
Measurement points are given in Table 9.
nSD, nCD recovery time and pulse width
Table 9. Measurement points
Supply voltage
Input
VDD
5 V to 15 V
VM
0.5VDD
Output
VM
0.5VDD
VX
0.1VDD
VY
0.9VDD
VDD
VI
G
VO
DUT
RT
CL
001aag182
Fig 6.
Test and measurement data is given in Table 10;
Definitions test circuit:
DUT = Device Under Test.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VDD
5 V to 15 V
Input
VI
VSS or VDD
tr, tf
20 ns
Load
CL
50 pF
HEF4013B_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 February 2013
© NXP B.V. 2013. All rights reserved.
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