NXP Semiconductors
PHD108NQ03LT
N-channel TrenchMOS logic level FET
VDS
ID
VGS(pl)
VGS(th)
VGS
QGS1 QGS2
QGS
QGD
QG(tot)
003aaa508
Fig 13. Gate charge waveform definitions
80
IS
(A)
60
104
C
(pF)
03ar66
103
102
10-1
1
Ciss
Coss
Crss
10
102
VDS (V)
Fig 14. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
03ar65
40
175 °C
Tj = 25 °C
20
0
0.2
0.4
0.6
0.8
1
1.2
VSD (V)
Fig 15. Source current as a function of source-drain voltage; typical values
PHD108NQ03LT_4
Product data sheet
Rev. 04 — 5 June 2009
© NXP B.V. 2009. All rights reserved.
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