CP2114-WM8523EK 데이터 시트보기 (PDF) - Silicon Laboratories

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CP2114-WM8523EK

SINGLE-CHIP USB AUDIO TO I2S DIGITAL AUDIO BRIDGE

Silicon Laboratories 

CP2114

An audio device accepting a multiple of 250 is thus compatible with USB clock requirements, whereas an audio

device requiring a 256 multiple is fundamentally incompatible with USB clock requirements. In this case, generally

one clock is needed for USB and another clock is needed for audio. The CP2114 supports a variety of

configurations to address this issue and is covered in Section 5.6.

5.5. USB Audio Synchronization Modes

The USB standard defines synchronization relative to source and sinks. For audio-out, the host is the source and

the device is the sink. For audio-in, the device is the source and the host is the sink. USB defines modes which

govern the operation of sources and sinks according to the following table. The CP2114 supports asynchronous

and synchronous modes.

Table 17. USB Audio Synchronization Modes

Mode

Source

Sink

Asynchronous

Free running clock

Provides implicit feedforward to the sink

Free running clock

Provides explicit feedback to the source

Synchronous

Clock locked to USB SOF

Uses implicit feedback

Clock locked to the USB SOF

Uses implicit feedback

Adaptive

Clock locked to sink

Uses explicit feedback

Clock locked to the data flow

Uses implicit feedback

Notes:

1. Implicit feedforward means the recipient determines the next data input size according to the current input

size (i.e. if 48 samples were sent in the current frame then expect the same number in the next frame).

2. Explicit feedback means the recipient of the feedback will receive an explicit request for the number of

samples to send in the next frame.

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Rev. 1.1

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