ISL6262 데이터 시트보기 (PDF) - Intersil

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ISL6262

Two-Phase Core Regulator for IMVP-6 Mobile CPUs

Intersil 

Functional Block Diagram

ISL6262

6µA

PVCC

VDD

VIN

ISEN2

ISEN1

3V3

PGOOD

CLK_EN#

PGD_IN

RBIAS

54µA

PVCC

VIN

PVCC

1.18V 1.2V

PVCC

DRIVER

LOGIC

FLT

PVCC

PVCC

ULTRA-

SONIC

TIMER

DRIVER

LOGIC

FLT

CURRENT

BALANCE

VSOFT

I_BALF

VIN

OC

MODULATOR

VSOFT

VIN

OC

MODULATOR

CH1

CH2

PGOOD

MONITOR

AND LOGIC

FLT

PGOOD

FAULT AND

PGOOD

LOGIC

CH1 CH2

PHASE

Vw

PHASE

SEQUENCER

VO

CONTROL

VIN

LOGIC

SINGLE

PHASE

OC

VO

SOFT

-

SINGLE

PHASE

DACOUT

0.5

Vw

SINGLE

PHASE

E/A

-

VSOFT

1

1

-

-

DAC

VO

DROOP

MODE

10µA

CONTROL

-

GND

VW

COMP

FB2

FB

SOFT

VDIFF

RTN

VSEN

VO

FIGURE 1. SIMPLIFIED FUNCTION BLOCK DIAGRAM OF ISL6262

8

FN9199.2

May 15, 2006

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