MST705
Small Size LCD TV Processor with Video Decoder
Preliminary Data Sheet Version 0.1
REGISTER DESCRIPTION
General Control Register
General Control Register
Index Name
Bits Description
00h
REGBK
7:0 Default : 0x00
Access : R/W
XTAL_OK (RO)
7 Crystal ready.
MCU_SEL (RO)
6 0: Embedded MCU.
1: External serial bus interface.
-
5:4 Reserved.
AINC
3 Serial bus address auto Increase.
0: Enable.
1: Disable.
-
2 Reserved.
REGBK[1:0]
1:0 Register Bank Select.
Mstar Confidential 00: Register of scaler.
01: Register of ADC/ACE/MCU.
10: Register of Video Decoder Front End (VFE).
for 深圳市江启科技有限公司 REGBK[2:0]
11: Register of Video Decoder 2D Comb Filter (VCF).
2:0 Register Bank Select.
Internal Use Only 000: Register of scaler.
001: Register of ADC/ACE/MCU.
010: Register of Video Decoder Front End (VFE).
011: Register of Video Decoder 2D Comb Filter (VCF).
100: Register of LVDS/DPWM.
01h ~ -
FFh
-
7:0 Default : -
7:0 Reserved.
Access : -
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Copyright © 2010 MStar Semiconductor, Inc. All rights reserved.
11/2/2010